Lecture, four hours; outside study, eight hours. Detailed study of various physical design automation problems of VLSI circuits, including logic partitioning, floorplanning, placement, global routing, channel and switchbox routing, planar routing and via minimization, compaction and performance-driven layout. Discussion of applications of number of important optimization techniques, such as network flows, Steiner trees, simulated annealing, and generic algorithms. Letter grading.