Lecture, four hours; outside study, eight hours. Enforced requisite: course 115C. Challenges of digital circuit design and layout in deeply scaled technologies, with focus on design-manufacturing interactions. Summary of large-scale digital design flow; basic manufacturing flow; lithographic patterning, resolution enhancement, and mask preparation; yield and variation modeling; circuit reliability and aging issues; design rules and their origins; layout design for manufacturing; test structures and process control; circuit and architecture methods for variability mitigation. Letter grading.

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Enrollment Progress

Jan 17, 11 PM PST
LEC 1: 34/45 seats taken (Open)
Week 1Week 21 day4 days7 days10 days0204060

Course

Instructor
Puneet Gupta
Previously taught
25W 22W 18F
Formerly offered as
EL ENGR 201D

Previous Grades

Grade distributions not available.